Anri Nakajima

Last Updated :2024/04/03

Affiliations, Positions
Research Institute for Nanodevice and Bio Systems, Associate Professor
E-mail
anakajimahiroshima-u.ac.jp

Basic Information

Academic Degrees

  • Doctor of Science, TOHOKU UNIVERSITY
  • Master of Science, TOHOKU UNIVERSITY

Research Fields

  • Interdisciplinary science and engineering;Applied physics;Applied materials

Research Keywords

  • single electron devices
  • gate dielectrics
  • atomic-layer deposition

Educational Activity

Course in Charge

  1. 2024, Undergraduate Education, 3Term, Semiconductor Process Engineering
  2. 2024, Undergraduate Education, Year, Graduation Thesis
  3. 2024, Graduate Education (Master's Program) , First Semester, Seminar on Electronics A
  4. 2024, Graduate Education (Master's Program) , Second Semester, Seminar on Electronics B
  5. 2024, Graduate Education (Master's Program) , Academic Year, Academic Presentation in Electronics
  6. 2024, Graduate Education (Master's Program) , 1Term, Exercises in Electronics A
  7. 2024, Graduate Education (Master's Program) , 2Term, Exercises in Electronics A
  8. 2024, Graduate Education (Master's Program) , 3Term, Exercises in Electronics B
  9. 2024, Graduate Education (Master's Program) , 4Term, Exercises in Electronics B
  10. 2024, Graduate Education (Master's Program) , 2Term, Molecular and Bio Devices Engineering
  11. 2024, Graduate Education (Master's Program) , Academic Year, Advanced Study in Quantum Matter
  12. 2024, Graduate Education (Doctoral Program) , Academic Year, Advanced Study in Quantum Matter

Research Activities

Academic Papers

  1. Growth and electrical properties of atomic-layer deposited ZrO2/Si-nitride stack gate dielectrics, JOURNAL OF APPLIED PHYSICS, 95(2), 536-542, 20040115
  2. Application of highly-doped Si single-electron transistors to an exclusive-NOR operation, JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS, 43(3B), L418-L420, 20040315
  3. Interface trap generation induced by charge pumping current under dynamic oxide field stresses, IEEE ELECTRON DEVICE LETTERS, 26(3), 216-218, 200503
  4. Abnormal enhancement of interface trap generation under dynamic oxide field stress at MHz region, APPLIED PHYSICS LETTERS, 86(8), 20050221
  5. Modified direct-current current-voltage method for interface trap density extraction in metal-oxide-semiconductor field-effect-transistor with tunneling gate dielectrics at high temperature, JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS, 44(1-7), L60-L62, 2005
  6. Room-temperature operation of an exclusive-OR circuit using a highly doped Si single-electron transistor, APPLIED PHYSICS LETTERS, 86(12), 20050321
  7. Enhancement of BTI degradation in pMOSFETs under high-frequency bipolar gate bias, IEEE ELECTRON DEVICE LETTERS, 26(6), 387-389, 200506
  8. Atomic-layer-deposited Si-nitride/SiO2 stack gate dielectrics for future high-speed DRAM with enhanced reliability, IEEE ELECTRON DEVICE LETTERS, 26(8), 538-540, 200508
  9. Annealing temperature dependence on nickel-germanium solid-state reaction, JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS, 44(24-27), L753-L755, 2005
  10. Interface trap and oxide charge generation under negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin plasma-nitrided SiON gate dielectrics, JOURNAL OF APPLIED PHYSICS, 98(11), 20051201
  11. Periodic Coulomb oscillations in Si single-electron transistor based on multiple islands, JOURNAL OF APPLIED PHYSICS, 98(12), 20051215
  12. Influence of bulk bias on negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics, JOURNAL OF APPLIED PHYSICS, 99(6), 20060315
  13. Carrier mobility in metal-oxide-semiconductor field effect transistor with atomic-layer-deposited Si-nitride gate dielectrics, JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS, 44(28-32), L903-L905, 2005
  14. Pulse waveform dependence on AC bias temperature instability in pMOSFETs, IEEE ELECTRON DEVICE LETTERS, 26(9), 658-660, 200509
  15. Mechanism of dynamic bias temperature instability in p- and nMOSFETs: The effect of pulse waveform, IEEE TRANSACTIONS ON ELECTRON DEVICES, 53(8), 1805-1814, 200608
  16. Electron detrapping characteristics in positive bias temperature stressed n-channel metal-oxide-semiconductor field-effect transistors with ultrathin HfSiON gate dielectrics, APPLIED PHYSICS LETTERS, 91(3), 20070716
  17. Atomic layer deposition of HfO2 using Hf[N(C2H5)(2)](4) and H2O, JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 45(9A), 7091-7093, 200609
  18. Cotunneling current in Si single-electron transistor based on multiple islands, APPLIED PHYSICS LETTERS, 89(18), 20061030
  19. Improvement in mobility and negative-bias temperature instability in metal-oxide-semiconductor field-effect transistors with atomic-layer-deposited Si-nitride/SiO2 stack dielectrics, JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 46(4B), 1874-1878, 200704
  20. Ar annealing for suppression of gate oxide thinning at shallow trench isolation edge, IEEE ELECTRON DEVICE LETTERS, 28(7), 562-564, 200707
  21. Electrical characteristics of Si single-electron transistor based on multiple islands, JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 46(9B), 6233-6236, 200709
  22. Atomic layer deposition of HfO2 and Si nitride on Ge substrates, JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 46(12), 7699-7701, 200712
  23. Bias temperature instability in metal-oxide-semiconductor field-effect transistors with atomic-layer-deposited Si-nitride/SiO(2) stack gate dielectrics, JOURNAL OF APPLIED PHYSICS, 103(8), 20080415
  24. Silicon single-electron memory having in-plane dot with double gates, JAPANESE JOURNAL OF APPLIED PHYSICS, 47(6), 4985-4987, 200806
  25. Dependence of charge storage and programming characteristics on dot number of floating dot memory, APPLIED PHYSICS LETTERS, 92(22), 20080602
  26. ★, Impact of floating dot distribution on memory characteristics of self-aligned dots-on-nanowire memory, JOURNAL OF APPLIED PHYSICS, 105(11), 20090601
  27. Conduction Path Fluctuation in Silicon Two-Dimensional Tunnel Junction Array, JAPANESE JOURNAL OF APPLIED PHYSICS, 48(6), 200906
  28. Fabrication of Si Nanowire Field-Effect Transistor for Highly Sensitive, Label-Free Biosensing, JAPANESE JOURNAL OF APPLIED PHYSICS, 48(6), 200906
  29. Monte Carlo Simulation of the Two-Dimensional Site Percolation Problem for Designing Sensitive and Quantitatively Analyzable Field-Effect Transistors, JAPANESE JOURNAL OF APPLIED PHYSICS, 48(10), 200910
  30. Effect of an Ultrathin SiN Cap Layer on the Bias Temperature Instability in Metal-Oxide-Semiconductor Field-Effect Transistors with HfSiON Gate Stacks, JAPANESE JOURNAL OF APPLIED PHYSICS, 49(12), 2010
  31. Functional gate metal-oxide-semiconductor field-effect transistors using tunnel injection/ejection of trap charges enabling self-adjustable threshold voltage for ultralow power operation, APPLIED PHYSICS LETTERS, 98(5), 20110131
  32. Highly sensitive ion detection using Si single-electron transistors, APPLIED PHYSICS LETTERS, 98(12), 20110321
  33. Fabrication Technologies for Double-SiO2-Barrier MOS Transistor with a Poly-Si Dot, Jpn. J. Appl. Phys., 40(3B), 2017-2020, 20010301
  34. ★, Si quantum dot formation with low-pressure chemical vapor deposition, Jpn. J. Appl. Phys., 35(part2, 2B), L189-L191, 19960201
  35. Isolated nanometer-size Si dot arrays fabricated using electron-beam lithography, reactive ion etching, and Wet Etching in NH4OH/H2O2/H2O, Jpn. J. Appl. Phys., 33(part2, 12B), L1796-L1798, 19941201
  36. ★, Defect-induced Raman spectra in doped CeO2, Phys. Rev. B, 50(18), 13297-13307, 19941101
  37. Local-hopping mechanism of the O2- vacancy in stabilized ZrO2 studied by measuring the integrated intensity of quasielastic light scattering, Phys. Rev. B, 49(21), 14949-14957, 19940601
  38. Interpretation of the temperature dependence of the luminescence intensity, lifetime, and decay profiles in porous Si, Phys. Rev. B, 49(16), 11005-11009, 19940401
  39. Luminescence spectroscopy of porous Si by selective excitation, J. Phys. Soc. Jpn., 63(suppl. B), 190-202, 19940401
  40. c-Si like phonon structures in the luminescence of porous Si, J. Luminescence, 60&61, 324-326, 19940401
  41. ★, Observation of phonon structures in porous Si luminescence, Phys. Rev. Lett., 70(23), 3659-3662, 19930601
  42. Microstructure of porous silicon, Appl. Phys. Lett., 62(21), 2631-2633, 19930501
  43. Quantum-size effect from photoluminescence of low-temperature-oxidized porous Si, Jpn. J. Appl. Phys., 32(part1, 1B), 415-418, 19930101
  44. ★, Photoluminescence of porous Si, oxidized then deoxidized chemically, Appl. Phys. Lett=, 61(1), 46-48, 19920701
  45. Local structures in the superionic conductor Y3+-doped CeO2 studied using site-selective spectroscopy, Phys. Rev. B, 44(10), 4862-4871, 19910401
  46. Soft-breakdown-suppressed ultrathin atomic-layer-deposited silicon nitride/SiO2 stack gate dielectrics for advanced complementary metal-oxide-semiconductor technology, Appl. Phys. Lett=, 79(21), 3488-3490, 20011101
  47. Characterization of atomic-layer-deposited silicon nitride/SiO2 staked gate dielectrics for highly reliable p-metal-oxide-semiconductor field-effect transistors, B 19(4), 1138-1143, 20010701
  48. Low-temperature formation of silicon nitride gate dielectrics by atomic-Layer depositon:, Appl. Phys. Lett=, 79(5), 665-667, 20010701
  49. Self-limiting atomic-layer deposition of Si on SiO2 by alternate supply of Si2H6 and SiCl4:, Appl. Phys. Lett=, 79(5), 617-619, 20010701
  50. Low-temperature selective deposition of silicon on silicon nitride by time-modulated disilane flow and formation of silicon narrow wires, Appl. Phys. Lett=, 79(4), 494-496, 20010701
  51. Atomic-layer-deposited silicon nitride/SiO2 stacked gate dielectrics for highly reliable p-MOSFETs, Applied Physics Letters, 77(18), 2855-2857, 20000101
  52. Characterization of silicon/oxide/nitride layers by X-ray photoelectron spectroscopy, Applied Physics Letters, 75(11), 1535-1537, 19990901
  53. Si single-electron tunneling transistor with nanoscale floating dot stacked on a Coulomb island by self-alighed process, B17(5), 2163-2172, 19990401
  54. Microstructure and electrical properties of Sb nanocrystals formed in thin, thermally grown SiO2 layers by low-energy ion implantation, B 17(4), 1317-1322, 19990401
  55. Calculation of electrical properties of novel double-barrier metal oxide semiconductor transistors, Jpn. J. Appl. Phys., 38(part1,1B), 399-402, 19990101
  56. Silicon single-electron memory using ultra-small floating gate, 34(2), 142-152, 19980401
  57. Coulomb blockade in Sb nanocrystals formed in thin, thermally grown SiO2 layers by low-energy ion implantation, Appl. Phys. Lett=, 73(8), 1071-1073, 19980401
  58. ★, Microstructure and electrical properties of Sn nanocrystals in thin, thermally grown SiO2 layers formed via low energy ion implantation, J. Appl. Phys., 84(3), 1316-1320, 19980401
  59. Theoretical analysis of write errors and number of stored electrons for ten-nanoscale Si floating-dot memory, Jpn. J. Appl. Phys., 37(part2, 6B), L709-L711, 19980601
  60. Single Electron Charging Effect of Sn Nanocrystals in Thin SiO2 Film Formed by Low Energy Ion Implantation, J81-C-II(2), 274-275, 19980401
  61. Formation of Sn nanocrystals in SiO2 film using low-energy ion implantation, Appl. Phys. Lett=, 71(25), 3652-3654, 19971201
  62. Formation of Sb nanocrystals in SiO2 film using ion implantation followed by thermal annealing, Jpn. J. Appl. Phys., 36(part2,11B), L1552-L1554, 19971101
  63. ★, Si single electron tunneling transistor with nanoscale floating dot stacked on a Coulomb island by self-aligned process, Appl. Phys. Lett=, 71(3), 353-355, 19970701
  64. ★, Room temperature operation of Si single-electron memory with self-aligned floating dot gate, Appl. Phys. Lett=, 70(13), 1742-1744, 19970301
  65. ★, Microstructure and optical absorption properties of Si nanocrystals fabricated with low-pressure chemical-vapor deposition, J. Appl. Phys., 80(7), 4006-4011, 19961001
  66. Site-selective spectroscopy of Eu3+ in YSZ and Y3+-doped CeO2, Solid State Ionics, 40/41, 316-319, 19900401
  67. Investigations of valence charge of Tb ions in ZrO2-Tb4O7 mixed conductor using XANES measurements, Solid State Ionics, 35, 323-327, 19890401
  68. Determination of ionic diffusion coefficients and activation energies in (ZrO2)1-x(YbO1.5)x system by using quasielastic light scattering, Solid State Ionics, 28-30, 512-517, 19880401
  69. Influence of Wafer Storage Environment on MOS Device Characteristics, 17(2), 96-104, 20020601
  70. Local-hopping mechanism of an oxygen vacancy in ZrO2 doped with Sc3+ studied by measuring quasi-elastic light scattering, Solid State Ionics, 146, 133-141, 20020101
  71. NH3-annealed atomic-layer-deposited silicon nitride as a high-k gate dielectric with high reliability, Appl. Phys. Lett=, 80(7), 1252-1254, 20020201
  72. Low thermal-budget ultrathin NH3-annealed atomic-layer-deposited Si-nitride/SiO2 stack gate dielectrics with excellent reliability, IEEE Electron Device Lett., 23(4), 179-181, 20020401
  73. Coulomb blockade effects and conduction mechanism in extremely thin polycrystalline-silicon wires, J. Appl. Phys., 91(8), 5213-5220, 20020401
  74. Reliable extraction of the energy distribution of Si/SiO2 interface traps in ultrathin metal-oxide-semiconductor structures, Appl. Phys. Lett=, 80(21), 3952-3954, 20020501
  75. Fabrication of Si single-electron transistors having double SiO2 barriers, Appl. Phys. Lett=, 80(24), 4617-4619, 20020601
  76. Conduction mechanism of Si single-electron transistors having an one-dimensional regular array of multiple tunnel junctions, Appl. Phys. Lett=, 81(4), 733-735, 20020701
  77. High quality NH3-annealed atomic Layer Deposited Si-nitride/SiO2 Stack Gate Dielectrics for Sub-100nm Technology Generations, Solid State Electron, 46, 1657-1662, 20020401
  78. Low-temperature formation of highly-reliable silicon-nitride gate dielectrics with suppressed soft-breakdown phenomena for advanced complementary metal-oxide-semiconductor technology, 20(4), 1406-1409, 20020701
  79. Atomic-layer deposition of ZrO2 with a Si nitiride barrier layer, Appl. Phys. Lett=, 81(15), 2824-2826, 20021001
  80. Response to "Comment on ’Reliable extraction of the energy distribution of Si/SiO2 interface traps in ultrathin metal-oxide-semiconductor structures’" [Appl. Phys. Lett. 81, 3681(2002)], Appl. Phys. Lett=, 81(19), 3683-3684, 20021101
  81. ★, Atomic-layer-deposited silicon-nitride/SiO2 stack ---- a highly potential gate dielectrics for advanced CMOS technology, Microelectronics Reliability, 42, 1823-1835, 20021201
  82. Organic Contamination Dependence of Process Induced Interface Trap Generation in Ultrathin Oxide Metal Oxide Semiconductor Transistors, Jpn. J. Appl. Phys., 42(12A), L1429-L1432, 20031201
  83. High quality atomic-layer-deposited ultrathin Si-nitride gate dielectrics with low density of interface and bulk traps, APPLIED PHYSICS LETTERS, 83(2), 335-337, 20030714
  84. Carrier mobility in p-MOSFET with atomic-layer-deposited Si-nitride/SiO2 stack gate dielectrics, IEEE ELECTRON DEVICE LETTERS, 24(7), 472-474, 200307
  85. Biomolecule detection based on Si single-electron transistors for highly sensitive integrated sensors on a single chip, APPLIED PHYSICS LETTERS, 100(2), 20120109
  86. In-Plane Grain Orientation Alignment of Polycrystalline Silicon Films by Normal and Oblique-Angle Ion Implantations, JAPANESE JOURNAL OF APPLIED PHYSICS, 51(4), 201204
  87. Charge redistribution in a charge storage layer containing C-60 molecules and organic polymers for long electron retention, APPLIED PHYSICS LETTERS, 101(21), 20121119
  88. Characteristics of metal-oxide-semiconductor field-effect transistors with a functional gate using trap charging for ultralow power operation, JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 31(1), 201301
  89. Excellent retention characteristics of nanocomposite gate insulator consisting of fullerene-containing polystyrene, APPLIED PHYSICS LETTERS, 103(1), 20130701
  90. ★, Biomolecule detection based on Si single-electron transistors for practical use, APPLIED PHYSICS LETTERS, 103(4), 20130722
  91. ★, Memory operation mechanism of fullerene-containing polymer memory, APPLIED PHYSICS LETTERS, 106(10), 103302-1-103302-5, 20150309
  92. Dependence of memory characteristics of fullerene-containing polymer on the kind of gate metal, JAPANESE JOURNAL OF APPLIED PHYSICS, 54(10), 201510
  93. Novel polymer composite having diamond particles and boron nitride platelets for thermal management of electric vehicle motors, JAPANESE JOURNAL OF APPLIED PHYSICS, 55(2), 027101-1-027101-8, 201602
  94. ★, Application of Single-Electron Transistor to Biomolecule and Ion Sensors, Appllied Sciences, 6(4), 94-1-94-4, 20160401
  95. ★, Mechanism of Static and Dynamic Bias Temperature Instability in p- and n-MOSFETs, ECS transaction, 6(3), 203-228, 2007
  96. ★, Fullerene-Containing Electrically Conducting Electron Beam Resist for Ultrahigh Integration of Nanometer Lateral-Scale Organic Electronic Devices, SCIENTIFIC REPORTS, 7, 20170627